Solid state (SS) relays providing great isolation between the control signal and relay "contacts" are known. See U.S. Pat. No. 4,227,098, issued Oct. 7, 1980, to D. N. Brown, et al. Such a solid state relay typically utilizes a field-effect transistor (FET) as the switched element. The cycle time (total turn-on and turn-off time) in a solid state relay is limited by the inherent characteristics of the solid state relay components. In particular, parasitic capacitance exists between the gate and source of an FET. Because of the capacitance, as input current is increased relay turn-on time desirably decreases but turn-off time undesirably increases. This undesirable slow turn-off occurs because a relatively high input control current charges the gate-to-source capacitor faster and to a higher voltage than would a lower control current. The higher voltage results in a relatively longer discharge time which slows the turn-off of the FET and therefore of the solid state relay.
To overcome this slow turn-off, prior art relays (U.S. Pat. No. 4,227,098, for example) utilize a gate-to-source resistor to provide a discharge path with the lower the resistor value, the faster the turn-off time. However, a lower resistor value results in a lower gate-to-source current during turn-on which results in a slower turn-on time.